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Digital Architecture

by Steve DellaSala last modified December 17, 2006

The digital architecture of the RDC-7 includes a vast array of cutting-edge technology combined with several unique features. From superior DAC's to proprietary technology, the RDC-7 is a sophisticated processor capable of audiophile performance. The sections below outline the digital/analog architecture that serves as the backbone for the RDC-7's impressive performance.

Digital to Analog Converters (DACs) for front channels

DAC.gifThe Front channels employ dual differential Burr Brown (now part of Texas Instruments) PCM1704, SoundPlus (TM) 24-Bit, 96kHz BiCMOS Sign-Magnitude Digital-To-Analog Converters . This is an improvement to many "high-end" processors that utilize single ended DAC's for their front channels. The PCM1704 is a precision, 24-bit digital-to-analog converter with high dynamic performance, ultra-low distortion and excellent low-level signal performance. The PCM1704 supports 8X oversampling at 96kHz.

Dual differential DAC implementation can offer quite an improvement over a single-ended configuration, especially if the entire design path is complimentary. Integra Research takes it one step further with a low jitter Apogee clock that ensures the full performance of the DAC's can be realized.

Digital to Analog Converters (DACs) for other channels

Analog.gifThe center, surrounds, rear surrounds and subwoofer channels implement Analog Devices AD1853 24 Bit, 192 kHz, Multibit Sigma-Delta DACs in a single-ended configuration. The AD1853 is fully compatible with sample rates from 32 kHz up to and including 192 kHz. It also achieves 120 dB of dynamic range and Signal-to-Noise ratio without muting of 107 dB THD+N. The AD1853 also features a superior Digital Filter with 115 dB stop-band-attenuation. The AD1853 uses Analog Devices' exclusive Multibit Sigma-Delta Modulator with "Perfect Differential Linearity" for reduced idle tones. It also features Analog's patented Data Directed Scrambling to minimize sensitivity to jitter.

Just to note, while these are quality DAC's, Integra Research implemented them in a single-ended configuration. This single-ended configuration is similar to that found in the Integra DTC-9.4 and many other receivers and processors currently available. Even with the low jitter Apogee clock and Vector Linear Conversion described below, we wonder if including dual differential DAC implementation with full complimentary circuit topology on all channels would have offered an audible improved performance from these channels. However, our listening tests did not appear to reveal any major sonic limitations in its current configuration.

Digital Signal Processing (DSP)

DSP.jpgThere are two 493000 series Cirrus Logic Crystal Enhanced, Dual Engine, Multi Standard Digital Audio Decoders (otherwise known as DSP chips) in the RDC-7. One DSP chip is devoted to Dolby Digital and DTS decoding, while the other is devoted to secondary functions. By implementing two DSP's, Integra Research has employed technology above that of many other processors we have reviewed in this price range. However, we wonder if their next generation platform will require more horsepower to handle new features such as room correction or digital video processing which seems to be the next evolutionary step in home theater products.

Apogee Low Jitter Clock

Apogee.jpgPerhaps the most notable feature within the digital topology of the Integra Research RDC-7 is the low jitter clock from Apogee. Apogee Electronics was founded in 1985 by Betty Bennett and Bruce Jackson, both veterans of the professional audio industry. They formed the company for one purpose: to deliver the highest possible quality for digital audio.

Apogee's patented low jitter clock audibly cleans up jitter by taking in erratic or jittery timing signals and putting out cleaner, lower jitter signals. This allows optimum A/D and D/A conversion for improved sonic performance.

For more information on the Digital Architecture of the RDC-7: download the following Technical Paper

 
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